1. Field of the Invention
The present invention relates to a voltage supply circuit including components such as a DC-DC converter adapted to supply a positive or negative drive voltage to a display device driver. The present invention also relates to a display device and electronic equipment having the same and a voltage supply method using the same.
2. Description of the Related Art
An image display device such as liquid crystal display or organic EL (Electro luminescence) display has a number of pixels arranged in a matrix form. Such a display device displays an image by controlling the optical intensity of each pixel according to image information to be displayed.
In this type of display device, a power supply circuit including a DC-DC converter may be provided in the display panel.
FIG. 1 is a circuit diagram illustrating a configuration example of a DC-DC converter. FIG. 2 is a timing diagram of the DC-DC converter illustrated in FIG. 1.
A DC-DC converter 1 illustrated in FIG. 1 has an output transistor 2 formed by an n-channel MOS (NMOS) transistor (n1). The DC-DC converter 1 also has other transistors 3 and 4 formed by p-channel MOS (PMOS) transistors (p1, p2).
A node A is formed by a connection point between the source of the output transistor 2 and the drain of the transistor 3. A node B is connected to the gate of the output transistor 2, the gate of the transistor 3 and the drain of the transistor 4.
The node A is connected to a capacitor 5 (Cap1) supplied with a clock CKg. The node B is connected to a capacitor 6 (Cap2) supplied with a clock xCKg which is reverse in phase to the clock CKg.
In the DC-DC converter 1, the gate and source of the output transistor 2 are supplied with the capacitively coupled clock pulses, thus generating a negative supply voltage Vssg.
Incidentally, the D-D converter has a CMOS configuration.
Among techniques to provide larger panel production volume is a technique in which a TFT circuit is configured using single-type transistors (transistors of identical polarity) (PMOS or NMOS).
A variety of single-type configuration circuits have been proposed for level shifter, buffer, inverter, and shift register used in this type of power supply circuit. For more information, refer to Japanese Patent Laid-Open Nos. 2005-123864, 2005-123865, 2005-143068, 2005-149624.